AI Patent Summary

Patent Document
#US6345353B2
United States Patent
Abstract
The stack pointer is used for generating the next unutilized location in the stack memory device in order to indicate where a current value in the program counter is to be written. The stack pointer also generates a directly preceding loca- tion to the next unutilized location in order to read the last value of the program counter that was written to the stack memory device. The stack pointer will select the next unutilized location in the stack memory device for a write operation and the directly preceding location to the next unutilized location in the stack memory device for a read operation. The stack pointer will further perform either a post increment or post decrement operation on the next unutilized location in the stack memory device after execu- tion of a current instruction. 8 Claims, 1 Drawing Sheet AVE MASTER (CH LATCH INCREMENT) DECREMENT 5 ' 1 ' ' i ' t : 24 201 ! ' ' ' i ' I { | ' { ' { { { | : cN4 STACK RAM 16
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Patent Classification & AI Product Mapping
Authoritative patent classification definitions mapped to real-world technology domains and commercial product categories.
CPC G06F7/00
Confidence: High
Official Definition
Methods or arrangements for processing data by operating upon the order or content of the data handled
PHYSICS > COMPUTING OR CALCULATING; COUNTING > ELECTRIC DIGITAL DATA PROCESSING
AI Technology & Product Mapping
Technology Domain:
Processor Architecture & Data Processing
Product Category:
Microprocessors & Central Processing Units
Plain-English Summary:
General techniques and hardware for manipulating data values, such as changing their sequence, format, or structure.
Relation to Claims:
The patent deals with managing data flow in a stack memory by handling write and read locations via a stack pointer, which aligns with general data processing and sequencing.
CPC G06F7/76
Confidence: High
Official Definition
Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
PHYSICS > COMPUTING OR CALCULATING; COUNTING > ELECTRIC DIGITAL DATA PROCESSING
AI Technology & Product Mapping
Technology Domain:
Digital Logic & Data Routing
Product Category:
Processor Core Components
Plain-English Summary:
Circuits or methods that change the order or arrangement of data items based on fixed rules, without looking at what the data actually means.
Relation to Claims:
Relates to the deterministic incrementing and decrementing of the stack pointer to sequence memory access addresses independently of the program counter value stored.
CPC G06F7/78
Confidence: High
Official Definition
Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
PHYSICS > COMPUTING OR CALCULATING; COUNTING > ELECTRIC DIGITAL DATA PROCESSING
AI Technology & Product Mapping
Technology Domain:
Memory Management & Buffering
Product Category:
Hardware Stack Controllers
Plain-English Summary:
Hardware mechanisms specifically for reversing the order of data flow (such as Last-In-First-Out or LIFO stacks), including handling situations where the buffer becomes too full or too empty.
Relation to Claims:
Directly maps to the abstract's description of a stack memory device operating as a LIFO buffer, utilizing a stack pointer to handle read/write sequences.
CPC G06F7/785
Confidence: High
Official Definition
Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using a RAM
PHYSICS > COMPUTING OR CALCULATING; COUNTING > ELECTRIC DIGITAL DATA PROCESSING
AI Technology & Product Mapping
Technology Domain:
Embedded Memory Systems
Product Category:
RAM-based Stack Accelerators
Plain-English Summary:
LIFO stack implementations built using random-access memory (RAM) where individual storage locations can be directly addressed for adding or removing data items.
Relation to Claims:
The abstract explicitly mentions 'STACK RAM 16' and storage locations being selected by a stack pointer for write and read operations, making this a precise classification fit.
CPC G06F9/00
Confidence: High
Official Definition
Arrangements for program control, e.g. control units
PHYSICS > COMPUTING OR CALCULATING; COUNTING > ELECTRIC DIGITAL DATA PROCESSING
AI Technology & Product Mapping
Technology Domain:
Embedded Systems & Microcontrollers
Product Category:
CPU Control Units & Program Counters
Plain-English Summary:
Hardware and logic structures responsible for directing the execution sequence of computer programs, such as central processing unit control units.
Relation to Claims:
The patent tracks the 'program counter' value to manage execution flow, which is a core function of program control and instruction execution units.